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PROG-QE
FR-QE-0004

Below-Threshold Quantum Error Correction — Scalable Architecture

Quantum error correction can reduce logical error rates below physical error rates in a scalable architecture.

ResolvingVS-04·since 2026-09-14
Assessment trajectory
Resolvingstate held · last assessed 2026-09-14
Verification Matrix

Verification position derived from the record’s assessments; dates show when Faultline first recorded each stage.

VS-01
Assertion
—
VS-02
Published evidence
—
VS-03
Audit
—
VS-04
Replication
Current from 2024-01-15 — present
VS-05
Operation
—
Stage first recorded Current verification position Not yet recorded
State Warrant
Current stateResolvingVS-04
Why this state?Corrective assessment appended under LPR-001-D16 bounded repair. AS-001–AS-003 are preserved unchanged under append-only governance; AS-004 supersedes any legacy warrant that depended on the inaccurate representations repaired in IN-001, IN-002, IN-003 or IN-005.
Assessment summaryLPR-001-D16 correction materially changes the historical warrant but not the current state. Corrected IN-001 is component-level approach-to-threshold evidence, not an encoded logical-code result. Corrected IN-002 demonstrates logical SPAM below physical SPAM in a [[7,1,3]] trapped-ion colour code but explicitly stops short of claiming the system crossed the pseudo-threshold. Corrected IN-003 is a 2024 interested-party report of four logical qubits and substantial logical-versus-physical suppression, not a generic 10^-4 two-qubit logical-gate measurement. Corrected IN-005 is contextual topological-platform evidence and not third-platform below-threshold confirmation. AS-001's original reliance on IN-002 and IN-003 as stronger threshold/practical-error-rate demonstrations is therefore retired as a historical warrant. The present RESOLVING / VS-04 assessment remains warranted independently by the peer-reviewed Willow scaling result in IN-004 and the subsequent multi-code, sustained-operation and trapped-ion evidence through IN-010. None of the repaired instances satisfies OQ-001's d=11-and-above attractor.
State entered2024-01-15
Last reaffirmed2026-09-14
Mechanisms

Causal mechanisms recorded for this claim. The State Warrant above remains the authoritative current assessment.

Resistance MechanismRM-001

Physical qubit error floor at scale. Below-threshold operation at small code distances does not guarantee the behaviour continues as physical qubit count increases. Crosstalk, fabrication variability, and control complexity all tend to increase with system size. The resistance mechanism is not that below-threshold operation is unachievable — INST-004 demonstrates it is achievable — but that sustaining it as qubit count grows from hundreds to thousands to tens of thousands is an unsolved engineering problem. The claim as stated is in RESOLVING because the principle is established; this mechanism constrains how quickly the practical consequence follows.

AttractorAT-001

Demonstration at d=11 and beyond. The next decisive evidence event for this record is demonstration of below-threshold scaling at code distances d=11 and higher. At d=7, the Willow result establishes the behaviour. At d=11 or d=15, the result would confirm that the scaling continues into regimes relevant for practical fault-tolerant computation. This is the specific experimental milestone that would move the claim from RESOLVING toward a fully confirmed state. The attractor is clearly defined and the trajectory toward it is visible in current hardware development roadmaps.

Assessment History
2024-01-15
Initial assessment — Resolving
The claim has two components: below-physical-rate operation, and scalability of that operation. Both have been demonstrated. INST-002 established that below-physical-rate logical qubits are achievable in principle. INST-003 established that practically useful error rates are achievable on current hardware. INST-004 established that performance improves as the architecture scales — the defining signature of scalable below-threshold operation. No contesting evidence has been published against either component of the claim. The pressure state is RESOLVING: both elements the claim requires have been independently demonstrated and corroborate each other, though confirmation at the code distances required for practical fault-tolerant computation (d=11 and above) remains outstanding (OQ-001), and the claim's architecture-agnosticism has not yet been confirmed across a third hardware platform (OQ-002).
Verification Stage: VS-04 preserved — historically unverified.
2026-08-17
Reassessed, no change — Resolving
The record remains RESOLVING. The post-AS-001 evidence broadens the engineering case without crossing the remaining resolution boundary. IN-007 extends below-physical or breakeven behaviour to a qLDPC code on trapped-ion hardware; IN-008 demonstrates real-time recalibration that supports sustained error-corrected operation; and IN-009 shows that an essential entangling gate can preserve the favourable erasure-biased error hierarchy of superconducting dual-rail qubits. These are meaningful supportive developments across code family, sustained operation, and architecture. They do not, individually or together, demonstrate logical error suppression continuing at code distances d=11 and above, which remains OQ-001 and the record's decisive attractor. The contested Microsoft topological result remains corroborating rather than foundational. Pressure State therefore remains RESOLVING and Verification Stage remains VS-04; all three open questions remain live.
Issued during OHR-2026-09 catch-up review to close the evidence-assessment gap through IN-009. This assessment incorporates IN-007, IN-008, and IN-009 while preserving the d=11-and-above resolution threshold.
2026-09-14
Reassessed, no change — Resolving
Paetznick et al. (IN-010) materially strengthen the trapped-ion leg of the evidence by demonstrating fault-tolerant logical circuits with 11×–800× lower error rates than corresponding physical-circuit baselines across two error-correcting code constructions, including multi-qubit computation. This is stronger than a single small-code breakeven result and supports the proposition that below-physical logical performance is reproducible across distinct architectures and code designs. It does not, however, satisfy the record's governed remaining resolution criterion: sustained below-threshold scaling at code distances d=11 and above. The experiment also uses error detection and post-selection as material parts of the demonstrated suppression. The evidence trajectory therefore strengthens without crossing the resolution boundary. Pressure State remains RESOLVING and Verification Stage remains VS-04; OQ-001 remains decisive.
Normal Record Review of the candidate flagged by LPR-001-D16. IN-010 admitted with source-supported boundaries; no legacy LPR discrepancy was repaired through this review.
2026-09-14
Reassessed, no change — Resolving
LPR-001-D16 correction materially changes the historical warrant but not the current state. Corrected IN-001 is component-level approach-to-threshold evidence, not an encoded logical-code result. Corrected IN-002 demonstrates logical SPAM below physical SPAM in a [[7,1,3]] trapped-ion colour code but explicitly stops short of claiming the system crossed the pseudo-threshold. Corrected IN-003 is a 2024 interested-party report of four logical qubits and substantial logical-versus-physical suppression, not a generic 10^-4 two-qubit logical-gate measurement. Corrected IN-005 is contextual topological-platform evidence and not third-platform below-threshold confirmation. AS-001's original reliance on IN-002 and IN-003 as stronger threshold/practical-error-rate demonstrations is therefore retired as a historical warrant. The present RESOLVING / VS-04 assessment remains warranted independently by the peer-reviewed Willow scaling result in IN-004 and the subsequent multi-code, sustained-operation and trapped-ion evidence through IN-010. None of the repaired instances satisfies OQ-001's d=11-and-above attractor.
Corrective assessment appended under LPR-001-D16 bounded repair. AS-001–AS-003 are preserved unchanged under append-only governance; AS-004 supersedes any legacy warrant that depended on the inaccurate representations repaired in IN-001, IN-002, IN-003 or IN-005.
Claim Lineage

Historical narrative recorded for this claim. It does not override the current State Warrant.

1995–97
Threshold theorem established. Aharonov, Ben-Or, Shor, and others prove that below-threshold physical error rates permit arbitrarily long fault-tolerant computation. The theoretical possibility of the claim is established. The empirical question opens: can physical hardware reach and sustain below-threshold operation?
1998–2019
Approach from above. Superconducting hardware reaches component-level gate fidelities associated with the surface-code threshold, including Barends et al. (2014), while the field develops the experimental primitives needed for encoded error correction. These results do not yet demonstrate an encoded logical qubit with scalable logical error suppression.
2021–24
Small-code and logical-qubit evidence strengthens. Ryan-Anderson et al. (2021) report logical SPAM below physical SPAM in a [[7,1,3]] trapped-ion colour code while stating further upgrades may be needed to reach the pseudo-threshold. In 2024 Microsoft and Quantinuum announce four logical qubits with company-reported error suppression up to 800× relative to physical baselines. These results support logical error suppression but do not establish the remaining scalable surface-code criterion.
2024
Scalable below-threshold operation demonstrated. Google Willow confirms that adding physical qubits to the code continues to reduce logical error rates — the defining signature of scalable below-threshold operation. The claim enters RESOLVING.
2025
Microsoft's InAs–Al interferometric parity-measurement result provides contextual evidence for a proposed topological-qubit platform but does not demonstrate a protected logical qubit or below-threshold logical error correction; its topological interpretation later becomes formally contested.
2026
The engineering evidence broadens across code families and architectures. Paetznick et al. demonstrate 11×–800× logical error-rate improvements over physical-circuit baselines on trapped-ion hardware using 12- and 16-qubit error-correcting codes, while other 2026 results address qLDPC breakeven, sustained recalibration and erasure-biased gates. These results strengthen the RESOLVING trajectory without yet demonstrating the governed d=11-and-above scaling attractor.
Open Questions

Questions retained in this record. The current State Warrant may have narrowed or reframed earlier questions.

OQ-001

Does below-threshold scaling behaviour hold at code distances d=11 and above? This is the remaining decisive measurement before the claim can transition from RESOLVING to a fully confirmed state. AT-001 names this as the attractor.

Raised 2024-01-15
OQ-002

The claim is architecture-agnostic. Current evidence is concentrated in superconducting and trapped-ion systems. If topological qubit architectures — currently tracked only as contextual evidence within the corpus, without a dedicated Frontier Record — achieve confirmed below-threshold operation, this record gains a third platform confirmation. Does architecture-agnosticism require multi-platform demonstration, or is the current two-platform evidence sufficient for the claim as stated?

Raised 2024-01-15
OQ-003

What constitutes full confirmation of this claim — the transition from RESOLVING to a closed confirmed state? The corpus has no governed resolution criterion. The claim is precisely scoped and approaching resolution. Before another record reaches this point, the Observatory may need to address OQ-3 from FR-QE-0003: what does confirmation look like and who determines it?

Raised 2024-01-15
Mutation Log
MutationDateFieldPrior valueCurrent value
M-0172026-09-14provenance_repairLPR-001-D16 pendingLPR-001-D16 completed
M-0162026-09-14record_reviewLPR-001-D16 Record Review candidateIN-010 / AS-003
M-0152026-09-14provenance_review—LPR-001-D16
M-0142026-08-29provenance_enriched—PROVENANCE-ENRICHED
M-0132026-08-17assessment_issuedAS-001AS-002
M-0122026-08-08instance_appended—IN-009
M-0112026-07-14instances_appended—IN-007 / IN-008
M-0102026-07-09description_restored—DESCRIPTION-RESTORED
M-0092026-07-09description_reordered—DESCRIPTION-REORDERED
M-0082026-07-03reference_corrected—REFERENCE-CORRECTED
M-0072026-07-03instance_appended—INSTANCE-APPENDED
M-0062024-01-15programme_panel_added—PROGRAMME-PANEL-ADDED
M-0052024-01-15null_condition_met—NULL-CONDITION-MET
M-0042024-01-15mechanisms_recorded—MECHANISMS-RECORDED
M-0032024-01-15assessment_issued—ASSESSMENT-ISSUED
M-0022024-01-15instances_logged—INSTANCES-LOGGED
M-0012024-01-15record_created—RECORD-CREATED
Evidence Sources
10 instances on recordShow sources ↓Hide ↑
IN-001Barends et al. — superconducting gates reach the surface-code threshold1. Barends, R. et al. Superconducting quantum circuits at the surface code threshold for fault tolerance. Nature 508, 500–503 (2014). DOI 10.1038/nature13171 · Abstract; published 23 April 2014neutral
IN-002Ryan-Anderson et al. — real-time fault-tolerant QEC with a [[7,1,3]] colour code1. Ryan-Anderson, C. et al. Realization of real-time fault-tolerant quantum error correction. arXiv:2107.07505 (2021). · Abstract; submitted 15 July 2021supportive
IN-003Microsoft / Quantinuum — four logical qubits with company-reported error suppression1. Quantinuum and Microsoft. Quantinuum Partners with Microsoft in New Phase of Reliable Quantum Computing with Breakthrough Demonstration of Reliable Logical Qubits. 3 April 2024. · Company announcement; four logical qubits, 800x comparison and 14,000 circuit instances2. Microsoft. Advancing science: Microsoft and Quantinuum demonstrate the most reliable logical qubits on record with an error rate 800x better than physical qubits. 3 April 2024. · Contemporaneous company announcementsupportive
IN-004Google Willow — below-threshold operation confirmed at multiple code distances1. Google Quantum AI and Collaborators. Quantum error correction below the surface code threshold. Nature 638, 920–926 (2025). DOI 10.1038/s41586-024-08449-y · Abstract, Fig. 1 and Outlook; published online 9 December 2024supportive
IN-005Microsoft — single-shot fermion-parity measurement in InAs–Al devices1. Microsoft Azure Quantum et al. Interferometric single-shot parity measurement in InAs–Al hybrid devices. Nature 638, 651–655 (2025). DOI 10.1038/s41586-024-08445-2 · Abstract and discussion; published 19 February 2025partial
IN-006Legg et al. — peer-reviewed critique of topological gap detection; Microsoft response1. Legg, H. F. On the robustness of topological gap detection via transport. Nature 654, E22–E26 (2026). DOI 10.1038/s41586-026-10567-82. Microsoft Quantum et al. Reply to: On the robustness of topological gap detection via transport. Nature 654, E27–E28 (2026). DOI 10.1038/s41586-026-10568-7contesting
IN-007qLDPC breakeven on trapped-ion hardware1. Tham, E. et al. Breakeven demonstration of quantum low-density parity-check codes. arXiv:2606.06455 (2026). · Abstract; submitted 4 June 2026SUPPORTIVE
IN-008Real-time reinforcement-learning recalibration sustaining error-corrected operation1. Sivak et al., ‘Reinforcement learning control of quantum error correction’, Nature 655, 879–884 (2026) DOI 10.1038/s41586-026-10759-2 · Main text; reinforcement-learning control and error-correction resultsSUPPORTIVE
IN-009D-Wave — entangling gate for superconducting dual-rail erasure qubits1. D-Wave Quantum Inc. An entangling gate for dual-rail erasure qubits. Nature 656, 47–53 (2026). DOI 10.1038/s41586-026-10822-y · Abstract, gate benchmarking and DiscussionSUPPORTIVE
IN-010Paetznick et al. — fault-tolerant trapped-ion circuits suppress logical errors below physical baselines1. Paetznick, A. et al. Improved quantum processor logical error rates via correction and detection. Nature 654, 349–355 (2026). DOI 10.1038/s41586-026-10628-y · Abstract and main experimental results; published online 10 June 2026supportive